The best courses and conferences on electronics: 2007

Wednesday, December 19, 2007

IEEE SIES 2008 - Montpellier, France - June 11 - 13 - First Call for Papers

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| CALL FOR PAPERS |
|-----------------------------------------------------------------------|
| SIES'2008 |
| IEEE Third Symposium on Industrial Embedded Systems |
| June 11- 13, 2008 |
| Montpellier - La Grande Motte, FRANCE |
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Conference web site:

http://www.lirmm.fr/SIES2008/

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Sponsored by:
IEEE Industrial Electronics Society
LIRMM CNRS/University of Montpellier II

AIM
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The aim of the symposium is to bring together researchers and
practitioners from industry and academia and provide them with a
platform to report on recent developments, deployments, technology
trends and research results, as well as initiatives related to embedded
systems and their applications in a variety of industrial environments.
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BACKGROUND
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Application domains have had a considerable impact on the evolution of
embedded systems, in terms of required methodologies and supporting
tools and resulting technologies. SoCs and SoPC are slowly making
inroads into the area of industrial automation to implement complex
field-area intelligent devices which integrate the intelligent
sensor/actuator functionality by providing on-chip signal conversion,
data processing, and communication functions. There is a growing
tendency to network field-area intelligent devices around industrial
type of communication networks. Similar trends appear in the automotive
electronic systems where the Electronic Control Units, typically
implemented as heterogeneous system-on-chip, are networked by means of
one safety-critical communication protocol. The design of this kind of
networked embedded systems (this includes also hard real-time
industrial control systems) is a challenge in itself due to the
distributed nature of processing elements, sharing common
communication medium, and safety-critical requirements,
to mention some.
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TOPICS OF INTEREST
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Topics within the scope of the symposium will include, but are not
limited to:
-Embedded Systems
-System-on-Chip and Network-on-Chip Design & Testing
-Networked Embedded Systems
-Embedded Applications
-Multi-Processors Systems-on-Chips
-Sensors networks and ubiquitous computing
-Application of Reconfigurable and Adaptive Systems
-Automotive / Avionics systems
-Fault-tolerant embedded systems and applications
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SOLICITED PAPERS :
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- Long Papers - limited to 8 double column pages.
- Industry Practice (IP)– limited to 8 double column pages.
- Work-in-Progress (WIP)– limited to 4 double column pages.

Manuscripts must be submitted electronically in PDF format,
according to the instructions contained in the Symposium web site.
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AUTHOR'S SCHEDULE (Deadlines):
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Deadline for submission of proposals for long papers: Jan 18, 2008
Notification of acceptance for long papers: Mar 4, 2008
Final manuscripts for long papers submission: Apr 1, 2008

Deadline for WIP and IP papers: Mar 7, 2008
Notification of acceptance of WIP and IP papers: Apr 4, 2008
Final manuscripts of WIP & IP papers submission: Apr 14, 2008
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SPECIAL SESSION ORGANIZATION :
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To enhance the technical program and focus on specific topics and areas,
the SIES'2008 Symposium will include special sessions, in addition to
regular ones. Special sessions can cover subjects or cross-subjects
belonging to the topics of interest, or novel topics related with the
ones identified within the topics of interest. Special sessions can
also have the drive from specific R&D projects or clusters of projects,
namely EU-sponsored R&D projects.
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SIES'2008 COMMITTEES
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General Co-Chairs:
Luis Gomes, Univ. Nova Lisboa, PT
Gilles Sassatelli, LIRMM, CNRS/Univ. Montpellier 2, FR

Program Co-Chairs:
Leandro Indrusiak, Tech. Univ. Darmstadt, DE
Nicolas Navet, LORIA, FR

Work in Progress Co-Chairs:
Luis Almeida, Univ. Aveir, PT
Josep M. Guerrero, UPC, ES

Industry Liaison Committee:
Joao Miguel Fernandes (chair) Univ. Minho PT
Andrea Andenna, ABB Corporate Research, SE
Armando Walter Colombo, Schneider Electric, DE
Jean-Michel Daga, ATMEL Rousset, FR
Vladimir Oplustil, UNIS, CZ
Jean-Pierre Schoellkopf, STM Grenoble, FR

Finance Chair:
Pascal Benoit, LIRMM, FR

International Advisory Committee:
Richard Zurawski, ISA Group, USA (chair)
Marian Adamski, Univ. Zielona Gora, PL
Charles Andre, I3S/UNSA , FR
Juergen Becker, University of Karlsruhe, DE
Giuseppe Buja, University of Padova, IT
Mo-Yuen Chow, North Carolina State University, USA
Carlos Couto, University of Minho, PT
Paul Drews, APS-European Centre for Mechatronics, DE
Leopoldo Franquelo, Universidad de Sevilla, ES
J. David Irwin, Auburn University, USA
Karel Jezernik, Uni. Maribor, SL
Grant Martin, Tensilica, USA
Juan Pimentel, Kettering University, USA
Bogdan Wilamowski Auburn University USA
Francoise Simonot-Lion, LORIA, FR
P. S. Thiagarajan, National Univ. of Singapore, SG
Lionel Torres, LIRMM, FR
Bogdan Wilamowski Auburn University USA
Laurence T. Yang, St. Francis Xavier University, CA
Jing Bing Zhang, SIMTech, SG

Publicity Committee:
Luis Almeida, Univ. Aveiro ,PT
Ricardo Machado, Univ. Minho, PT
José Carlos Metrôlho, I.P.Castelo Branco ,PT
Christer Norstrom, Mälardalen University, SE
Chi-Sheng Shih, National Taiwan University, TW

SIES Series Steering Committee:
Luis Gomes, Univ. Nova Lisboa, PT (chair)
Eric Dekneuvel, I3S/UNSA , FR
James C. Hung, Univ. of Tennessee, USA
Richard Zurawski, ISA Group., USA

IES Information Technology Liaison
Antonio Luque Estepa, Universidad de Sevilla, ES

Publication Chair
Alberto Bosio, LIRMM, FR

Local Organizing Committee
Gilles Sassatelli, LIRMM, FR
Pascal Benoit, LIRMM, FR
Lionel Torres, LIRMM, FR
Nicolas Saint-Jean, LIRMM, FR
Olivier Brousse, LIRMM, FR
Michel Robert, LIRMM, FR
Alberto Bosio, LIRMM, FR

Technical Program Committee
Peter Palensky, TU Wien, AU
Paulo Maciel, Federal University of Pernambuco, BR
Paulo E. Miyagi, University of Sao Paulo, BR
Carlos Eduardo Pereira, Univ. Fed. Rio Grande do Sul, BR
Angelo Perkusich, Federal University of Campina Grande, BR
José Lastra, Tampere University of Technology, FI
Fabrice Muller, I3S UNSA, FR
Marek Wegrzyn, Univ. Zielona Gora, PL
Joao Paulo Barros, I.P.Beja, PT
António Ferrari, Universidade de Aveiro, PT
Valery Sklyarov, Universidade de Aveiro, PT
Joao Cardoso, Instituto Superior Técnico, PT
Carlos Cardeira, Instituto Superior Técnico, PT
Horácio Neto, Instituto Superior Técnico, PT
Luis Bernardo, Universidade Nova de Lisboa, PT
João Goes, Universidade Nova de Lisboa, PT
Zili Shao, Hong Kong Polytechnic University, HK
Alfredo Rosado Muñoz, Universitat de València, ES
Juan-Jose Rodriguez-Andina, Univ. Vigo, ES
Sandeep Shukla, Virginia Tech, USA
Ricardo Machado, Universidade do Minho, PT
Berhnard Schätz, T.U. Munich, DE
Thomas Nolte, MRTC Mälardalen, SE
Chi-Sheng Shih, National Taiwan University, TW
Gianluca Cena, IEIIT-CNR, IT
Anshul Kumar, IIT New-Delhi, IN
Wolfgang A. Halang, FernUniversität Hagen, DE
Jiman Hong, Kwangwoon University, KR
Chin-Long Wey, National Central University Taiwan, TW
Jeen G. Khor, Intel Malaysia Communications Design Center, MY
Sébastien Faucou, Irccyn, FR
Liliana Cucu, Loria, FR
Fernando Moraes, PUCRS, BR
Ian O'Connor, EC Lyon, FR
Luigi Carro, UFRGS, BR
Tanguy Risset, INRIA / ENS Lyon, FR
Falk Salewski, RWTH Aachen University, DE
Laurent George, ECE, FR
Dieter Zöbel, Univ. Koblenz-Landau, DE
Elvinia Riccobene, University of Milan, IT
José Alberto Fonseca, University of Aveiro, PT
Martin Horauer, University of Applied Sciences Technikum Wien, AU
José Barata, Univ. Nova Lisboa, PT
Tei-Wei Kuo, National Taiwan University, TW
Lucia Lo Bello, University of Catania, IT
Shashi Kumar, Jönköping University, SE
Tiberiu Seceleanu, ABB Corporate Research, SE
Peeter Ellervee, Tallinn University of Technology, ET
Adam Pawlak, Silesian University of Technology, PL
Jan Madsen, Technical University of Denmark, DK
Ingo Sander, Royal Institute of Technology, SE
Eduardo de la Torre, Universidad Politécnica de Madrid, ES
Christophe Bobda, University of Potsdam, DE
Bartolomeo Montrucchio, Politecnico di Torino, IT
Kim Sandström, Nokia Research, FI
Achim Rettberg, University of Paderborn, DE
Kenneth Kent, University of New Brunswick, CA
Patrick Schaumont, Virginia Tech, USA
Cesar Ortega-Sanchez, Curtin University of Technology, AUS
Ricardo Jacobi, University of Brasilia, BR
Christoph Grimm, TU Wien, AU
Sofiène Tahar, Concordia University, CA
Michael Huebner, University of Karlsruhe, DE
Jari Nurmi, Tampere University of Technology, FI
Edgar Nett, University of Magdeburg, DE
Enrico Vicario, University of Florence, IT
Iain Bate, University of York, UK
Marisol Garcia-Valls, University Carlos 3 of Madrid, ES
Paulo Pedreiras, University of Aveiro, PT
Arnaldo Oliveira, University of Aveiro, PT
Sergio Yovine, IMAG, FR
Stefan M. Petters, University of New South Wales, AUS
Marco di Natale, santAnna school of advanced studies, IT
Zdenek Hanzalek, Czech Technical University of Prague, CZ
Francoise Simonot-Lion, LORIA, FR
P. S. Thiagarajan, National University of Singapore, SG
Charles Andre, I3S/UNSA, FR
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CSICS '08 CFP: 2008 IEEE Compound Semiconductor IC Symposium

Please notice the Call For Papers for the 2008 IEEE Compound
Semiconductor IC Symposium, the preeminent international forum on developments
in integrated circuits using compound semiconductors such as GaAs, InP, GaN,
SiGe and other materials. They are looking forward to your high quality submissions on
the latest developments which advance the state-of-the-art. Note that the
deadline is on May 12, 2008. For additional information, please visit the CSICS
Website at <http://www.csics.org>.

http://www.csics.org

Friday, December 14, 2007

Submit your abstracts for CDNLive! EMEA 2008! - Deadline extended to January 11 2008!

To display this email in a browser, please click here:

http://emreact.com/go.asp?/bCAD001/q8CEQK4/xSBG35

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Attention System and IC Design Innovators.
It's time to submit your abstracts for CDNLive! EMEA 2008.

Due to popular demand, the Call for Papers period will be extended
until January 11, 2008.

We have received many good presentation submissions already. Due to
end of year project pressure, several customers have now asked for an
extension of the deadline as they have not found the time to submit an
abstract yet.

As CDNLive! EMEA is your event, we want to make sure we get YOUR
submission as well. Therefore we have extended the deadline until
January 11, 2008.

CDNLive! EMEA is the must-attend technical conference where big ideas
are brought to life. And because your papers are always a conference
highlight, we're inviting you to submit abstracts for consideration at
next year's event:

http://emreact.com/go.asp?/bCAD001/mUR06A4/qL006A4/uN0874/xBN1C5

This is a unique opportunity for you to network and discuss best
practices with other Cadence® technology users and industry experts.
By presenting a paper, you can also share your technical expertise,
pose thought-provoking questions, and offer tips and tricks.

Currently we are looking for experts like you to give presentations in
a variety of tracks, including Custom IC Design, Digital IC Design,
Functional Verification, Logic Design, Silicon-Package-Board
Co-design, and Special Interest.

This industry-leading event is being held from 28-30 April, 2008 in
Munich, Germany, but it will be here before you know it. Now is your
chance to bring your own ideas to life by submitting your abstract
today:

http://emreact.com/go.asp?/bCAD001/mUR06A4/qC096A4/uN0874/xBN1C5

For more information on CDNLive! EMEA 2008,visit:

http://www.cadence.com/cdnlive/eu

If your paper is accepted, your registration fee will be waived.

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Cadence respects your online time and privacy. To unsubscribe from all
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[RL SBG35]

----- Fi del missatge reenviat -----

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CALL FOR PAPERS: 50th International Symposium ELMAR-2008

~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
50th International Symposium ELMAR-2008
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

10-13 September 2008, Zadar, Croatia

Submission deadline: March 03, 2008

http://www.elmar-zadar.org/

CALL FOR PAPERS AND SPECIAL SESSIONS

TECHNICAL CO-SPONSORS

IEEE Region 8
EURASIP - European Assoc. Signal, Speech and Image Processing
IEEE Croatia Section
IEEE Croatia Section Chapter of the Signal Processing Society
IEEE Croatia Section Joint Chapter of the AP/MTT Societies

TOPICS

--> Image and Video Processing
--> Multimedia Communications
--> Speech and Audio Processing
--> Wireless Commununications
--> Telecommunications
--> Antennas and Propagation
--> e-Learning and m-Learning
--> Navigation Systems
--> Ship Electronic Systems
--> Power Electronics and Automation
--> Naval Architecture
--> Sea Ecology
--> Special Session Proposals - A special session consist
of 5-6 papers which should present a unifying theme
from a diversity of viewpoints; deadline for proposals
is February 04, 2008.

KEYNOTE TALKS

* Professor Sanjit K. Mitra, University of Southern
California, Los Angeles, California, USA:
Image Processing using Quadratic Volterra Filters

* Univ.Prof.Dr.techn. Markus Rupp, Vienna University
of Technology, AUSTRIA:
Testbeds and Rapid Prototyping in Wireless Systems

* Professor Paul Cross, University College London, UK:
GNSS Data Modeling: The Key to Increasing Safety and
Legally Critical Applications of GNSS

* Dr.-Ing. Malte Kob, RWTH Aachen University, GERMANY:
The Role of Resonators in the Generation of Voice
Signals

SPECIAL SESSIONS

SS1: "VISNET II - Networked Audiovisual Systems"
Organizer: Dr. Marta Mrak, I-lab, Centre for Communication
Systems Research, University of Surrey, UNITED KINGDOM
Contact: http://www.ee.surrey.ac.uk/CCSR/profiles?s_id=3937

SS2: "Computer Vision in Art"
Organizer: Asst.Prof. Peter Peer and Dr. Borut Batagelj,
University of Ljubljana, Faculty of Computer and Information
Science, Computer Vision Laboratory, SLOVENIA
Contact: http://www.lrv.fri.uni-lj.si/~peterp/

http://www.fri.uni-lj.si/en/personnel/298/oseba.html

SUBMISSION

Papers accepted by two reviewers will be published in
symposium proceedings available at the symposium and
abstracted/indexed in the INSPEC and IEEExplore database.

More info is available here: http://www.elmar-zadar.org/

IMPORTANT: Web-based (online) paper submission of papers in
PDF format is required for all authors. No e-mail, fax, or
postal submissions will be accepted. Authors should prepare
their papers according to ELMAR-2008 paper sample, convert
them to PDF based on IEEE requirements, and submit them using
web-based submission system by March 03, 2008.

SCHEDULE OF IMPORTANT DATES

Deadline for submission of full papers: March 03, 2008
Notification of acceptance mailed out by: April 21, 2008
Submission of (final) camera-ready papers : May 05, 2008
Preliminary program available online by: May 12, 2008
Registration forms and payment deadline: May 19, 2008
Accommodation deadline: June 02, 2008

GENERAL CO-CHAIRS

Ive Mustac, Tankerska plovidba, Zadar, Croatia
Branka Zovko-Cihlar, University of Zagreb, Croatia

PROGRAM CHAIR

Mislav Grgic, University of Zagreb, Croatia

INTERNATIONAL PROGRAM COMMITTEE

Juraj Bartolic, Croatia
David Broughton, United Kingdom
Paul Dan Cristea, Romania
Kresimir Delac, Croatia
Zarko Cucej, Slovenia
Marek Domanski, Poland
Kalman Fazekas, Hungary
Janusz Filipiak, Poland
Renato Filjar, Croatia
Borko Furht, USA
Mohammed Ghanbari, United Kingdom
Mislav Grgic, Croatia
Sonja Grgic, Croatia
Yo-Sung Ho, Korea
Bernhard Hofmann-Wellenhof, Austria
Ismail Khalil Ibrahim, Austria
Bojan Ivancevic, Croatia
Ebroul Izquierdo, United Kingdom
Kristian Jambrosic, Croatia
Aggelos K. Katsaggelos, USA
Tomislav Kos, Croatia
Murat Kunt, Switzerland
Panos Liatsis, United Kingdom
Rastislav Lukac, Canada
Lidija Mandic, Croatia
Gabor Matay, Hungary
Branka Medved Rogina, Croatia
Borivoj Modlic, Croatia
Marta Mrak, United Kingdom
Fernando Pereira, Portugal
Pavol Podhradsky, Slovak Republic
Ramjee Prasad, Denmark
Kamisetty R. Rao, USA
Gregor Rozinaj, Slovak Republic
Gerald Schaefer, United Kingdom
Mubarak Shah, USA
Shiguang Shan, China
Thomas Sikora, Germany
Karolj Skala, Croatia
Marian S. Stachowicz, USA
Ryszard Stasinski, Poland
Luis Torres, Spain
Frantisek Vejrazka, Czech Republic
Stamatis Voliotis, Greece
Nick Ward, United Kingdom
Krzysztof Wajda, Poland
Branka Zovko-Cihlar, Croatia

CONTACT INFORMATION

Assoc.Prof. Mislav Grgic, Ph.D.
FER, Unska 3/XII
HR-10000 Zagreb
CROATIA

Telephone: + 385 1 6129 851
Fax: + 385 1 6129 568
E-mail: elmar2008 (_) fer.hr

For further information please visit:

http://www.elmar-zadar.org/

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Tuesday, December 11, 2007

IEEE Staff Member Awarded

William F. Van Der Vort, executive director of the IEEE Electron Devices Society, received this year's Eric Herz Outstanding Staff Member Award.
The annual IEEE-sponsored award recognizes leadership and contributions to the success of the IEEE over a long period of time. Read on at http://bmsmail3.ieee.org:80/u/8823/40298008

[Fwd: ECS 213th Abstract Submission Deadline Only 1 Week Away]

CS 213th Abstract Submission Deadline Only 1 Week Away

ABSTRACT SUBMISSION | 213th ECS Meeting

Phoenix, AZ

May 18-23, 2008

Abstract Deadline: December 17, 2007
Only 1 week away!

Deadlines
Abstract Submission
Abstract Submission Now Open! | Please be aware that the abstract submission deadline is approaching. Abstracts are due NO LATER than December 17, 2007. Please carefully check each symposium listing for any alternative abstract submission deadlines. To submit an abstract, please follow the link to the online abstract submission system – http://ecsmeet5.peerx-press.org/cgi-bin/main.plex

Registration
Meeting registration will open in February. The deadline for Advance Registration is April 18, 2008.

Hotel
Hyatt Regency Phoenix is the Meeting hotel. Reservations are due by April 18, 2008 and can be made from the ECS website. To reserve a hotel room now, please follow the link to the online reservations page - http://phoenix.hyatt.com/groupbooking/phxrptels2008

ECS Transactions
Full papers presented at ECS meetings will be published in the online publication, ECS Transactions (ECST). Visit the ECS website for more details.

Travel Grants
Travel Grants are available for student attendees. Requests are due by December 17, 2007.

Visit the ECS website for meeting details.

www.electrochem.org

Batteries, Fuel Cells, and Energy Conversion • Biomedical Applications and Organic Electrochemistry • Corrosion, Passivation, and Anodic Films • Dielectric and Semiconductor Materials, Devices, and Processing • Electrochemical/Chemical Deposition and Etching • Electrochemical Synthesis and Engineering • Fullerenes, Nanotubes, and Carbon Nanostructures • Nanotechnology, Nanomaterials, and Nanoscience • Physical and Analytical Electrochemistry • Sensors and Displays: Principles, Materials, and Processing

Saturday, December 8, 2007

International Symposium on Flexible Electronics 2008

The first International Symposium on Flexible Electronics (ISFE 2008)
will be held in Tarragona, Catalonia, Spain, on April 6-9 2008.This new
conference is sponsored by the Engineering Conferences International
(ECI) Foundation, together with the Universitat Rovira i Virgili (URV,
Tarragona, Spain)The deadline for 300-word abstracts for oral
presentations has been extended to December 17 2008.Abstracts for
posters can be sent until February 2008, but will not be published in
the Book of Abstracts.The invited speakers who have confirmed their
participation are:Prof. Michael S Shur (RPI, Troy, NY, USA)Prof. Yue
Kuo (Texas A&M University)Prof. M. Jamal Deen (McMaster University,
Hamilton, ON, Canada)Prof. Takao Someya (Tokyo University, Japan)Dr
Warren Jackson (HP, Palo Alto, CA, USA)Prof. William Eccleston
(University of Liverpool, UK)Dr Euan Smith (CDT, Cambridge, UK)Dr Hagen
Klauk (Max Planck Institute for Solid-State Physics, Stuttgart, Germany)

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Friday, December 7, 2007

Second Call for Papers and Invited Sessions Proposals for CITSA 2008

Announcement
-------------------------------------------------------
January 9th is the new deadline for papers/abstracts submissions and Invited Sessions Proposals for CITSA 2008: The 5th International Conference on Cybernetics and Information Technologies, Systems and Applications (Orlando, Florida, USA, on June 29th to July 2nd, 2008) http://www.infocybereng.org/citsa2008
Authors Notification: February 20th, 2008
Camera ready, full papers: March 11th, 2008
-------------------------------------------------------

All Submitted papers will be reviewed by a double-blind (at least three reviewers), non-blind, and participative peer review. These three kinds of review will support the selection process of those that will be accepted for their presentation at the conference, as well as those to be selected for their publication in JSCI Journal. Details are given in the conference web site.

The registration fee of effective invited session organizers will be waived and they will receive at the registration desk, for free, 1) a package of 4 DVDs and one CD containing the 6-hour tutorial "Fundamentals and History of Cybernetics: Development of the Theory of Complex Adaptive Systems" and 2) a second 4-DVDs/1-CD package 6-hours tutorial titled "Cybernetic Management". The market price of each of these packages is US $ 295. Twelve more benefits for invited session organizers are listed at CITSA 2008 web page.

For submissions or Invited Sessions Proposals, please go to the web site: http://www.infocybereng.org/citsa2008/organizer.asp

Authors of the best 10%-20% of the papers presented at the conference will be invited to adapt their papers for their publication in the Journal of Systemics, Cybernetics and Informatics.

Each session to be included in the conference program will have corresponding electronic pre-conference and post-conference sessions for 15 days each. In the electronic pre-conference sessions authors will have access to the papers to be presented at their session and to an associated electronic forum, so they can be better prepared for their conference face-to-face session. Similarly, electronic post-conference sessions will complement and support a follow-up of the respective conference sessions, via an electronic forum and the possibility of evaluating papers presented at the associated session. These evaluations will also support the selection process for the papers to be published in JSCI journal.

Best regards,

CITSA 2008 Secretariat

Watch the New Analog eLab Webcast: Choosing the Best Galvanic Isolation Method

Choosing the Right Galvanic Isolation Method for Your Application

Click here to register
for this Webcast or
see additional eLab programs.

FREE Webcast—Register Now!

Date: Wednesday, December 12, 2007
Time: 11 a.m. (CST)

Design engineers have multiple options and design considerations when choosing and implementing galvanic isolation. Such options include capacitive, optical and inductive/magnetic isolation and their associated isolation standards issues, including voltage rating and creepage/clearance distances.

This Analog eLab™ webcast will provide information to help simplify the decision-making process in choosing the right isolation solution for your application.

Wm. P. (Bill) Klein, P.E., TI-HPL Senior Applications Engineer (Host)
Bill joined TI-Tucson through its acquisition of Burr-Brown in August 2000. In addition to a B.S.E.E. from Arizona State University and registration as a Professional Engineer in the State of Arizona, he has authored over 50 magazine articles, application notes and conference papers. With 30+ years experience as an analog circuit designer, his expertise ranges from mineral exploration to medical nuclear imaging. His current role is host of the monthly Analog e-Lab webcast, presenting real-world solutions to real-world problems.

Tim Lafferty worked in the telecom industry for 7 years as a board designer, systems engineer and project leader for various telecom products after graduating with a B.S.E.E. from Texas A&M. He began his career at Cypress Semiconductor as an FAE/field sales engineer. Currently, Tim works in worldwide marketing for the industrial interface product line at Texas Instruments.

Todd Frizzell, Sr. Applications Engineer, Arrow Electronics
Todd Frizzell is a senior applications engineer with Arrow Electronics. His 20 years experience includes analog, digital, DSP and FPGA design. Currently, his work ranges from conducting technology seminars to troubleshooting customer designs. Frizzell earned a B.S.E.E. and an MBA from the University of Central Florida.


Subscribe to the Analog Connection monthly e-newsletter for updates on new TI analog products, design tools, training and literature.

Technology for Innovators, the black/red banner, eLab and High-Performance Analog >> Your Way are trademarks of Texas Instruments. All other trademarks are the property of their respective owners.

Monday, December 3, 2007

ISPLC 2008 Call For Papers Deadline Extended to December 12, 2007

The 2008 IEEE International Symposium on Power-Line Communications and Its Applications (ISPLC 2008) will be held at the Ramada Plaza Jeju Hotel in Jeju Island, Korea during April 2-4, 2008. This is the 12th Annual ISPLC Meeting, now fully organized and operated under the auspices of the IEEE Communications Society.

The symposium is centered on the general problem of communication over power lines. It focuses on the latest technological advances in power line communications, as well as on current and future applications of power line communication systems. The goal of the symposium is to bring together academia, industry, and standardization organizations to stimulate research, development, and commercialization of all aspects of power line communication technology. The ISPLC 2008 is sponsored by the IEEE Communications Society, technically co-sponsored by the IEEE Power Engineering Society, and supported by Korea Information and Communications Society (KICS) and Korean Institute of Electrical Engineers (KIEE).

Prospective authors are invited to submit original contributions on all aspects of power line communications, including but not limited to:

* Channel Measurements and Modeling
* Standards and Regulations
* Electromagnetic Compatibility, Co-existence and Interoperability
* Modulation and Coding Techniques
* Security
* Utility Applications, AMR, and Services
* Multimedia Transmission and Signal Processing
* Multiple-Access Techniques
* Modem and LSI Design
* Network and Service Management
* System Architectures
* Experimental Systems and Field Trials
* PLC Command and Control

Full Paper Submission: extended December 12, 2007
Notification of Acceptance: January 15, 2008
Presenting Author Registration: January 31, 2008

For more information, please visit http://www.isplc2008.org/

ISVLSI in Montpellier, France, April 7-9 2008 - Deadline extented to December 12, 2007

Following the request of many authors, the Submission deadline was extended
to December 12, 2007.

************************************************************
*** IEEE COMPUTER SOCIETY ANNUAL SYMPOSIUM ON VLSI ***
April 7-9, 2008, Montpellier, France

http://www.lirmm.fr/isvlsi2008/

*** New Paper Submission Deadline: December 12th, 2007 ***

-> http://www.lirmm.fr/isvlsi2008/MyReview/

************************************************************

This Symposium explores emerging trends, novel ideas and concepts in the
area of VLSI. The Symposium covers a range of topics: from VLSI circuits,
systems, and design methods to system level design and system-on-chip
issues, to bringing VLSI experience to new areas and technologies.

Future design methodologies will also be one of the key topics at the
workshop, as well as new CAD tools to support them. For almost two decades,
the Symposium has been a unique forum promoting multidisciplinary research
and new visionary approaches in the area of VLSI.

It brings together leading scientists and researchers from academia and
industry, and has established a reputation in inviting well-known
international scientists as invited speakers. The 2008 edition will continue
to strive to achieve the high standards that participants have come to
expect of this Symposium.

__________________________________________________________________________

The symposium proceedings are published by IEEE Computer Society Press.
__________________________________________________________________________

We cordially invite you to participate and submit your contribution to
ISVLSI2008, which includes (but is not limited to) the following topics:

Networks on Chip
Multi Processor Systems on Chip
Emerging Trends in VLSI
Nanoelectronics: Molecular, Biological and Quantum Computing
MEMS
VLSI Circuits and Systems
System Level Design
Field-programmable & Reconfigurable Systems
System-on-Chip Design
Application-Specific Low Power VLSI System Design
System Issues in Complexity
Low Power
Heat Dissipation, Power Awareness in VLSI Design Test and Verification
Mixed-Signal Design and Analysis
Electrical/Packaging Co-Design
Physical Design
Intellectual property creating and sharing.

__________________________________________________________________________

Important dates are:

Submission Deadline: December 5, 2007 Manuscript, six two-column pages max.
Acceptance Notification: January 15, 2008
Submission of Final Version: February 10, 2008
__________________________________________________________________________

Authors should submit a PDF version of their papers through the web-based
submission interface, as described on the Symposium website.
__________________________________________________________________________

General Chair
Lionel Torres
LIRMM, Montpellier, France
University of Montpellier/CNRS

General Co-Chair
Amar Mukherjee
University of Central Florida, USA

Program Chair
Ian OConnor
Ecole Centrale de Lyon
INL, Lyon, France

Program Co-Chair
Asim Smailagic
Carnegie Mellon University, USA

Publicity Chair (Europe)
Reiner Hartenstein
TU Kaiserslautern, Germany

Publicity Chair (USA)
Don Bouldin
University of Tennessee, USA

Local Chair
Pascal Benoit
LIRMM, Montpellier, France
University of Montpellier/CNRS

Sunday, December 2, 2007

MIXDES Special Session on Compact Modelling

Let me remind you about a special session on Compact Modelling which
will be held during the nearest MIXDES Conference, Poznan', June 19-21,
2008 (http://www.mixdes.org). Its main topic, i.e. "Compact Modeling and
Characterization of Nano CMOS Technologies" is very, very closely
related the COMON domain. I am sure, that Your participation would
enrich the session level and would be very helpful for COMON activity.

IEEE Conference: IEEE 2008 IITC Call for Papers

IEEE 2008 International Interconnect Technology Conference
June 2-4, 2008
Hyatt Regency at San Francisco Airport, Burlingame, CA

SUBMISSION DATE: FEBRUARY 1, 2008

The 11th IITC Conference, the premier conference dedicated to advanced
interconnect technology, is soliciting paper submissions for the 2008
conference. The IITC provides a forum for professionals and researchers in
semiconductor processing, advanced materials, equipment development and
interconnect systems to present and discuss exciting new science and technology.
Now in its second decade, the conference will include new subjects of interest.
Contributions from universities, national laboratories, IDMs and equipment and
materials suppliers are encouraged.

Contributed papers addressing all aspects of interconnect technology (Materials
and Unit Processes; Process Integration; Process Modeling; Manufacturing
Issues; Reliability; 3D Processes and Integration; Interconnect Systems; System
in a Package; System-on-a-Chip; Novel Materials and Concepts) will be rigorously
reviewed and papers will be accepted for either oral or poster presentation.
Papers will be published in the conference digest and CD-ROM. The paper
submission deadline is February 1, 2008.

Complete details, including electronic paper submission and paper preparation
instructions, are available at: http://www.ieee.org/conference/iitc or contact
the conference at iitc@his.com

The IITC Conference is sponsored by the IEEE Electron Devices Society.

Thursday, November 29, 2007

[Fwd: Innovative Dynamic Studies of Materials at the Nanoscale - General Announcement & Call for Abstracts]

Dear Colleague,

Abstract submission is open for “Innovative Dynamic Studies of Materials at the Nanoscale”.

Abstracts for the “Innovative Dynamic Studies of Materials at the Nanoscale” conference, to be held in Gyeong-ju, Korea from June 29 – July 4, 2008 will be accepted through:

Invited and Contributed Oral Presentations: December 31, 2007

Contributed Poster Abstracts: March 31, 2008

For complete conference details, and to submit an abstract, please visit the conference web site: www.engconfintl.org/8ai.html

Thank you for your interest in our program.

Engineering Conferences International

info@eci.poly.edu

Wednesday, November 28, 2007

IDEAs DAY « Les matières des designs » - 18 décembre 2007 - MINATEC, Grenoble

Conferences de Minatec Ideas laboratory : Ideas day (Ideas laboratory, laboratoire , microtechnologie, nanotechnologie, nano, micro, interface, sphère personnelle, usage, conception assisté par l’usage) seminaires, CEA, nanotechnologie, conferences, conference, Minatec : Pole d'Innovation en Micro et nano technologies. MINATEC, CEA Leti, INPG,Grenoble, France

a le plaisir de vous annoncer son prochain

IDEAs Day
Le 18 décembre 2007 - 9h30 / 18h30
A la Maison des Micro et Nano Technologies - MINATEC - Grenoble

Conférence internationale « Les matières des designs »

Intervenants :
Bernard STIEGLER, Directeur de l'IRI Centre Pompidou - Fédérico CASALEGNO, Directeur du Mobile Experience Laboratory et directeur associé du Design Laboratory du MIT - Adam GREENFIELD, Spécialiste du design numérique, écrivain et consultant, enseignant à l'Université de New York - Alain CADIX, Directeur de l'ENSCI - Vincent CREANCE, Designer, directeur de l'agence Mbd - Frédéric BEUVRY, Directeur Corporate design, Groupe Seb.

En partenariat avec :

Télécharger le programme et le plan d'accès

Inscription auprès de Stéphanie CUMAN (stephanie.cuman@cea.fr) avant le 10 décembre 2007

Frais d'inscriptions :
- Partenaires de MINATEC IDEAs Laboratory® : Gratuit
- Extérieurs : 40 € (repas compris)
- Enseignants, chercheurs et étudiants : 15 €
Règlement par chèque à l'ordre de l'Agent comptable de l'Université Stendhal

213th ECS Meeting - Abstract Submission Deadline 3 Weeks Out

ABSTRACT SUBMISSION | 213^th ECS Meeting

Phoenix, AZ

May 18-23, 2008

Abstract Deadline: December 17, 2007

Only 3 weeks away!

Deadlines
Abstract Submission
Abstract Submission Now Open! | Please be aware that the abstract submission deadline is approaching. Abstracts are due NO LATER than December 17, 2007. Please carefully check each symposium listing for any alternative abstract submission deadlines. To submit an abstract, please follow the link to the online abstract submission system – http://ecsmeet5.peerx-press.org/cgi-bin/main.plex

Registration
Meeting registration will open in February. The deadline for Advance Registration is April 18, 2008.

Hotel
Hyatt Regency Phoenix is the Meeting hotel. Reservations are due by April 18, 2008 and can be made from the ECS website.

ECS Transactions
Full papers presented at ECS meetings will be published in the online publication, ECS Transactions (ECST). Visit the ECS website for more details.

Travel Grants
Travel Grants are available for student attendees. Requests are due by December 17, 2007.

Visit the ECS website for meeting details.

www.electrochem.org

--  ************************* Rodrigo Picos Prof. Colaborador Dept. Física Univ. Illes Balears Tel. +34 971 172505 Fax. +34 971 172486 http://sedemos.blogspot.com/ Ed. Mateu Orfila Campus UIB 07122 - Baleares SPAIN *************************

ISPLC 2008 Call For Papers Deadline Extended to December 2, 2007

Prospective authors are invited to submit original contributions on all aspects of power line communications, including but not limited to:

Full Paper Submission: extended December 2, 2007
Notification of Acceptance: January 15, 2008
Presenting Author Registration: January 31, 2008

For more information, please visit http://www.isplc2008.org/

Thursday, November 22, 2007

IEEE Young Professional Online Seminar: 21st Century Engineer

-------- Mensaje original --------

Asunto:	IEEE Young Professional Online Seminar: 21st Century Engineer
Fecha:	Wed, 21 Nov 2007 15:00:00 -0500
De:	IEEE GOLD <gold@ieee.org>
Responder a:	gold@ieee.org
Para:	rodrigo.picos@uib.es
Referencias:	<A11956715544897142385.rodrigo.picos@uib.es>

IEEE GOLD is sponsoring their last online seminar for 2007, "The 21st Century Engineer", by Adrian Pais scheduled for Tuesday, 4 December 2007 at 9:00am Eastern (New York) or 14:00 GMT for one hour.   Seminar Abstract: The last decade has seen a dramatic change in the economic and social landscape of society. At the forefront of this change has been the engineering profession, which has consistently produced groundbreaking innovations. Today, engineers are faced with ever-changing business models, shorter product life cycles, cutthroat competition and conflicting values. This talk will discuss the changing nature of the engineering profession, and the challenges and opportunities that this presents. Six essential values that an engineer should possess in the 21st century will be identified and discussed: holism, leadership, continuous learning, creativity, entrepreneurship and social responsibility.   Biography: Adrian Pais (PhD) is a telecommunications specialist presently working in a consulting role for the Netherlands Organization for Scientific Research (TNO). He serves as a representative for young engineers on the IEEE Publication Services and Products Board. His paper on "The 21st century engineer" won the IET (The Institution of Engineering and Technology) Write Around the World competition, and he has presented it in several countries including New Zealand, Zambia, Netherlands, United Kingdom, Germany and Hong Kong.   To register for the online seminar, go to http://lra100.livemeeting.com/LRSRegistration/EC/ieee/460474922.aspx . For more information on the seminar, go to http://www.ieee.org/web/membership/gold/events/APaisDec07.html.  Registration for this seminar will close on Saturday, 1 December 2007.  ================================================================================ You have received this mailing because you are a member of IEEE and/or one of the IEEE Technical Societies.   To unsubscribe, please go to http://ewh.ieee.org/enotice/options.php?SN=Picos Gaya&LN=GOLD and be certain to include your IEEE member number.   If you need assistance with your subscription, please contact k.n.luu@ieee.org ================================================================================

Tuesday, November 20, 2007

ISVLSI in Montpellier, France, April 7-9 2008 - Call for Paper

¤---------------------------------------------------------------¤
IEEE COMPUTER SOCIETY ANNUAL SYMPOSIUM ON VLSI
¤---------------------------------------------------------------¤
April 7-9, 2008, Montpellier, France

http://www.lirmm.fr/isvlsi2008/

¤---------------------------------------------------------------¤

¤---------------------------------------------------------------¤
3 weeks remaining to submit your article!!!

-> http://www.lirmm.fr/isvlsi2008/MyReview/

ISVLSI 2008 - Paper Submission Deadline: December 5th, 2007
¤---------------------------------------------------------------¤

This Symposium explores emerging trends, novel ideas and concepts in the
area of VLSI. The Symposium covers a range of topics: from VLSI circuits,
systems, and design methods to system level design and system-on-chip
issues, to bringing VLSI experience to new areas and technologies.

Future design methodologies will also be one of the key topics at the
workshop, as well as new CAD tools to support them. For almost two decades,
the Symposium has been a unique forum promoting multidisciplinary research
and new visionary approaches in the area of VLSI.

It brings together leading scientists and researchers from academia and
industry, and has established a reputation in inviting well-known
international scientists as invited speakers. The 2008 edition will continue
to strive to achieve the high standards that participants have come to
expect of this Symposium.

__________________________________________________________________________

The symposium proceedings are published by IEEE Computer Society Press.
__________________________________________________________________________

We cordially invite you to participate and submit your contribution to
ISVLSI2008, which includes (but is not limited to) the following topics:

Networks on Chip
Multi Processor Systems on Chip
Emerging Trends in VLSI
Nanoelectronics: Molecular, Biological and Quantum Computing
MEMS
VLSI Circuits and Systems
System Level Design
Field-programmable & Reconfigurable Systems
System-on-Chip Design
Application-Specific Low Power VLSI System Design
System Issues in Complexity
Low Power
Heat Dissipation, Power Awareness in VLSI Design Test and Verification
Mixed-Signal Design and Analysis
Electrical/Packaging Co-Design
Physical Design
Intellectual property creating and sharing.

__________________________________________________________________________

Important dates are:

Submission Deadline: December 5, 2007 Manuscript, six two-column pages max.
Acceptance Notification: January 15, 2008
Submission of Final Version: February 10, 2008
__________________________________________________________________________

Authors should submit a PDF version of their papers through the web-based
submission interface, as described on the Symposium website.
__________________________________________________________________________

General Chair
Lionel Torres
LIRMM, Montpellier, France
University of Montpellier/CNRS

General Co-Chair
Amar Mukherjee
University of Central Florida, USA

Program Chair
Ian OConnor
Ecole Centrale de Lyon
INL, Lyon, France

Program Co-Chair
Asim Smailagic
Carnegie Mellon University, USA

Publicity Chair (Europe)
Reiner Hartenstein
TU Kaiserslautern, Germany

Publicity Chair (USA)
Don Bouldin
University of Tennessee, USA

Local Chair
Pascal Benoit
LIRMM, Montpellier, France
University of Montpellier/CNRS

----- Fi del missatge reenviat -----

----------------------------------------------------------------

International Conference on IC Design & Technology - Minatec Grenoble, France; June 2nd – June 4th , 2008

CICDT 2008 : International Conference on IC Design & Technology CEA, nanotechnologie, conferences, conference, Minatec : Conference, IC Designn Technology , IC, design, IEE, Leti, CEA, MINATEC, CEA Leti, INPG,Grenoble, France

Call for Papers

Paper Deadline: February 29th, 2008
International Conference on IC Design & Technology
Minatec Grenoble, France;
June 2nd – June 4 th, 2008

As IC design & process technology continue to advance for increased performance, lower power, and accelerated time-to-market, the engineering activities, traditionally separated along the boundary of design and process technology, will have difficulties in meeting the shrinking window of product optimization tasks. The International Conference on IC Design & Technology provides a forum for engineers, researchers, scientists, professors and students to cross this boundary through interactions of design and process technology on product development & manufacturing. The unique workshop style of the conference provides an opportunity to technologists and product designers to e xchange breakthrough ideas and collaborate effectively. T wo days of technical presentations and workshops will be preceded by a one-day tutorial program of value to both the expert and the beginner.

The venue of 2008 ICICDT will be Minatec® – Maison des Micro et Nano Technologies at Grenoble, France: www.icicdt.org

Papers are solicited on:
• Design approaches including system, circuit and EDA to manage power, leakage, process variation, signal integrity, reliability, yield, and manufacturability.
• Advanced VLSI design, including processors, ASICs, memories, analog and mixed-signal circuits.
• System-on-Chip (SoC), System-in-Package (SiP), and IP reuse for fast design closure.
• Advanced materials, advanced metallization, and 3D interconnection as both, novel interconnect scheme for future MPUs and approach for realization of SoCs.
• Process and circuit technology for advanced memories: MRAM, FeRAM, PRAM, Nanocrystal Memory, Flash, etc with emphasis on reliability.
• Advanced transistor structures for bulk, multiple Gate, FDSOI, PDSOI, SSOI, SiGe, etc technologies
• RFCMOS characterization, model, simulation for multiple gate technologies
• New gate materials for adjusting Vt, enhanced mobility & scalability, low leakage, and low power.
• SER, thermal, leakage, PID, reliability, yield, etc effects on advanced transistor structures and circuits.
• Simulation & modeling on advanced process, device & circuit.
• Nanotechnology materials, devices and circuits.
• Emerging IC technologies and circuits crossover such as organic IC's, integrated sensors and integrated actuators.

Prospective authors are invited to submit a camera-ready paper of maximum four pages in length, including figures and references. The authors should obtain paper submission guidelines from http://www.ICICDT.org. Accepted/Invited papers will be printed in the proceedings of the conference (also available on CD-ROM). Paper submission deadline is February 29, 2008.

Conference Format

ICICDT features a popular and unique format structured to maximize face-to-face interaction. An abbreviated synopsis of each paper is presented in a plenary session, following which a workshop-style forum allows for deeper give-and-take communication on an individual basis. Many participants in previous years have commented that this interaction is very rewarding.

Contact Information

For further general information or assistance in selecting a subject area, please contact:

• Organizing Committee:

- General chair	Tanay Karnik	tanay.karnik@intel.com
- Conference chair	Amara Amara	amara.amara@isep.fr
- Executive committee chair	Thuy Dao	thuy.dao@freescale.com
- Local arrangement chair	Marc Belleville	marc.belleville@cea.fr
- Publication chair	Thomas Ea	thomas.ea@isep.fr
- Publicity chair	Ingo Aller	aller@de.ibm.com
- Tutorial chair	Ali Keshavarzi	ali.keshavarzi@intel.com
- Treasurer	Christine Nora	c.nora@ieee.org
- Secretary	Jean-Luc Leray	jean-luc.leray@cea.fr

• Technical Sub-Committee Chairs:

Advanced Memory Devices
	- Susumu Shuto	susumu.shuto@toshiba.co.jp
	- Jan Ackaert	jan_ackaert@amis.com

CAD
	- Ruchir Puri	ruchir@us.ibm.com

DFM/DFT/DFR/DFY
	- Keith Bowman	keith.a.bowman@intel.com
	- Jason Stinson	jason.stinson@intel.com

Low Power
	- Toshinari Takayanagi	ttoshi@pasemi.com
	- Geoffrey Yeap	gyeap@qualcomm.com

SoC/MPSoC/SIP, IC & Platform Design and Process
	- Aurangzeb Khan - Dac Pham	akkhan@cadence.com dac.pham@freescale.com

SER
	- Giorgio Cellere	giorgio.cellere@ieee.org

System Level Technology Assessment
	- Phillip Christie	phillip.christie@nxp.com

Emerging Technology
	- Simon Deleonibus	simon.deleonibus@cea.fr

RF & Analog, Mixed signal
	- Didier Belot	didier.belot@st.com

NBTI & High K Gate Reliability
	- Koji Eriguchi	eriguchi@kuaero.kyoto-u.ac.jp

Advanced Materials
	- Chadwin Young	Chadwin.young@sematech.org

Adv. Transistor Structure, Architecture & Process
	- Dong-Won Kim - Arnaud Pouydebasque	timo.kim@samsung.com arnaud.pouydebasque@nxpcrolles.st.com